Tutorial 4: Worked solutions
Electrical Engineering I · Module 92315 · Tutorial 4
Model the initial stack as two capacitors in series. After the lower dielectric shifts, its overlap and the air-filled part form parallel branches beneath the upper dielectric.
Task 8: Electrostatics
Two square plates of side a are separated by total distance d. Initially, dielectric 1 (εr,1) fills the upper half and dielectric 2 (εr,2) fills the lower half, each of thickness d/2. Edge effects are neglected; the exposed surrounding region is air with relative permittivity 1. The voltage arrow points downward; take positive U0 to produce a downward field. Both relative permittivities are much greater than 1.
Connected topic: Capacitance (§1.13) relates plate geometry and permittivity to charge and voltage; the interface conditions explain how the displacement crosses the two layers.
8a: Find D and E
Try first: use continuity of the normal displacement at the dielectric boundary and add the two half-gap voltage drops.
Attempted it? Open the worked steps
8a · Fields in the two layers
With no free charge at the internal interface, the normal component of D is the same in both layers. The voltage arrow sets the field downward for positive U0; denote the downward displacement magnitude by D0:
D1 = D2 = −D0 ez
In each linear dielectric, D = ε0εrE. The downward potential drop across each thickness d/2 adds to U0:
U0 = D0ε0 εr,1 · d2 + D0ε0 εr,2 · d2
D0 = 2ε0 εr,1 εr,2 U0d(εr,1 + εr,2)
Apply the constitutive relation separately to each layer:
D = −2ε0 εr,1 εr,2 U0d(εr,1 + εr,2) ez
E1 = −2εr,2 U0d(εr,1 + εr,2) ez, E2 = −2εr,1 U0d(εr,1 + εr,2) ez
For negative U0, the vectors reverse. Check: substituting the two field magnitudes into the half-gap drops gives exactly U0.
8b: Equivalent circuit before the shift
Try first: decide whether the layers lie one after another along the field or side by side across the plate area.
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8b · Series connection
Every field line crosses dielectric 1 and then dielectric 2. The same free charge magnitude sits on each plate, while the voltage divides between the layers, so the capacitors are in series:
C1 in series with C2
Series. One path from the top plate to the bottom plate through both layers: the same charge on each, the voltage shared. The interface has no free surface charge, so the normal displacement (and therefore the series charge) is common to both. Check: a parallel model would incorrectly assign the full plate voltage to each half-thickness layer.
8c: Total capacitance before the shift
Try first: calculate each layer’s plate capacitance using area a2 and thickness d/2, then combine in series.
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8c · Series capacitance
For a parallel-plate layer, C = εA/t. Each layer has area a2 and thickness d/2:
C1 = 2ε0 εr,1 a2d, C2 = 2ε0 εr,2 a2d
Series capacitances add by reciprocals:
1C = 1C1 + 1C2
C = 2ε0 a2 εr,1 εr,2d(εr,1 + εr,2)
Check: this is smaller than either layer capacitance, as a series equivalent must be.
8d: Surface charge on the lower face of the top plate
Try first: dot D with the outward normal from the metal into the dielectric at that face.
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8d · Free surface charge density
The bottom face of the top plate points outward from the conductor in the −ez direction. The free charge density on a conductor surface is D · n just outside the metal:
σ0 = D · (−ez)
Since D also points downward for positive U0, the dot product is positive:
σ0 = 2ε0 εr,1 εr,2 U0d(εr,1 + εr,2)
The units are C/m². Reversing the applied voltage reverses the surface-charge sign.
The lower dielectric is now shifted out along +ex by a distance x, with 0 ≤ x ≤ a. Its overlap width is a−x; the exposed gap beneath the upper dielectric is filled with air.
8e: Equivalent circuit after the shift
Try first: identify the full-area layer crossed by every field line, then split the lower half into the two side-by-side regions.
Attempted it? Open the worked steps
8e · Series and parallel sections
All paths pass through dielectric 1 across the full area a2. In the lower half, some area a(a−x) contains dielectric 2 and the remaining area a x contains air. Those lower branches share the same voltage:
C1 in series with (C2 ∥ CL)
Series, then parallel. Every path crosses C1; below it the path splits between the εr,2 part (C2) and the air strip (CL), which share one voltage. Thus C2 and CL are in parallel with one another, and their equivalent is in series with C1. Check: at x = 0 the air branch has zero area; at x = a the lower dielectric branch has zero area.
8f: Capacitance as a function of x
Try first: find each lower-region capacitance from its area and thickness, add the parallel branches, then combine that result in series with C1.
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8f · Capacitance after displacement
The upper layer keeps area a2 and thickness d/2. The two lower branches each have thickness d/2:
C1 = 2ε0 εr,1 a2d
C2(x) = 2ε0 εr,2 a(a − x)d, CL(x) = 2ε0 a xd
Add the parallel pair and then use the series formula:
Cp(x) = C2(x) + CL(x) = 2ε0 ad[εr,2 a + (1 − εr,2)x]
C(x) = C1 Cp(x)C1 + Cp(x)
C(x) = 2ε0 ad · εr,1 a[εr,2 a + (1 − εr,2)x]εr,1 a + εr,2 a + (1 − εr,2)x
Endpoint checks: C(0) matches 8c, while C(a) is the series combination of the upper dielectric and an air layer of thickness d/2.
8g: Minimum and maximum capacitance
Try first: check how the lower parallel capacitance changes with x, then use that the series equivalent increases when either component capacitance increases.
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8g · Locate the extrema
The lower equivalent is linear in x:
Cp(x) = 2ε0 ad[εr,2 a + (1 − εr,2)x]
Because εr,2 is much greater than 1, its slope is negative. The series equivalent C1Cp/(C1+Cp) increases monotonically with Cp.
Therefore the total capacitance decreases throughout 0 ≤ x ≤ a:
maximum at x = 0, minimum at x = a
If εr,2 were exactly 1, the lower region would be air everywhere and the capacitance would be constant; the sheet specifies εr,2 much greater than 1, excluding that degenerate case.
Personal worked-solution guide based on the supplied EE1 Tutorial Task sheet, written in my own words; no tutorial text or figures are reproduced. Not an official FAU publication; check course details against current material. Made by Thanate Amornjiraporn (Focus).